Verilog Coding for Logic Synthesis | Buch

Cover: 9780471429760 | Verilog Coding for Logic Synthesis | Weng Fook Lee | Buch | Englisch

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Sprache: Englisch

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Beschreibung

Provides a practical approach to Verilog design and problem solving.
* Bulk of the book deals with practical design problems that design engineers solve on a daily basis.
* Includes over 90 design examples.
* There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification.
* Book is suitable for use as a textbook in EE departments that have VLSI courses

Über den Autor

WENG FOOK LEE is a prominent member of the Technical Staff (MTS) at Advanced Micro Devices (AMD) Design Center. He has vast experience in designing with Verilog and VHDL, and is an acknowledged expert in the field of RTL coding and logic synthesis. Lee is an expert at synthesizing and tweaking design synthesis, and in developing and implementing new logic verification, synthesis, auto-place-route, and back-annotation design methodology. He has experience in the design and synthesis of PCI, ISA and LPC bridges, chipsets, microcontrollers, RISC microprocessors, and state-of-the-art, high-speed, low-power flash memory.

Inhaltsverzeichnis

Table of Figures.

Table of Examples.

List of Tables.

Preface.

Acknowledgments.

Trademarks.

Introduction.

Asic Design Flow.

Verilog Coding.

Coding Style: Best-Known Method for Synthesis.

Design Example of Programmable Timer.

Design Example of Programmable Logic Block for Peripheral Interface.

Details

Erscheinungsjahr:	2003
Fachbereich:	Nachrichtentechnik
Genre:	Technik
Rubrik:	Naturwissenschaften & Technik
Medium:	Buch
ISBN-13:	9780471429760
ISBN-10:	0471429767
Sprache:	Englisch
Einband:	Gebunden
Autor:	Lee, Weng Fook
Hersteller:	Wiley John Wiley & Sons
Maße:	240 x 161 x 23 mm
Von/Mit:	Weng Fook Lee
Erscheinungsdatum:	17.04.2003
Gewicht:	0,671 kg

Artikel-ID: 102563615