He has eight books to his credit including Satellite Technology: Principles and Applications, Microwaves and Radar, Handbook of Electronics, Electronics and Communication Simplified, Electronics for Competitions, Television Technician's Course, Electronics Projects for Beginners and Facing the Interview Board for Electronics Professionals. He has also authored about 150 technical articles and papers in national and international magazines and conferences and has two patents (Patent pending) to his credit. He is Life Fellow of Institution of Electronics and Telecommunication Engineers (IETE) and Life Member of Indian Laser Association

Preface xxi

1 Number Systems 1

1.1 Analogue Versus Digital 1

1.2 Introduction to Number Systems 2

1.3 Decimal Number System 2

1.4 Binary Number System 3

1.4.1 Advantages 3

1.5 Octal Number System 4

1.6 Hexadecimal Number System 4

1.7 Number Systems - Some Common Terms 4

1.7.1 Binary Number System 4

1.7.2 Decimal Number System 5

1.7.3 Octal Number System 5

1.7.4 Hexadecimal Number System 5

1.8 Number Representation in Binary 5

1.8.1 Sign-Bit Magnitude 5

1.8.2 1's Complement 6

1.8.3 2's Complement 6

1.9 Finding the Decimal Equivalent 6

1.9.1 Binary-to-Decimal Conversion 6

1.9.2 Octal-to-Decimal Conversion 6

1.9.3 Hexadecimal-to-Decimal Conversion 7

1.10 Decimal-to-Binary Conversion 7

1.11 Decimal-to-Octal Conversion 8

1.12 Decimal-to-Hexadecimal Conversion 9

1.13 Binary-Octal and Octal-Binary Conversions 9

1.14 Hex-Binary and Binary-Hex Conversions 10

1.15 Hex-Octal and Octal-Hex Conversions 10

1.16 The Four Axioms 11

1.17 Floating-Point Numbers 12

1.17.1 Range of Numbers and Precision 13

1.17.2 Floating-Point Number Formats 13

Review Questions 17

Problems 17

Further Reading 18

2 Binary Codes 19

2.1 Binary Coded Decimal 19

2.1.1 BCD-to-Binary Conversion 20

2.1.2 Binary-to-BCD Conversion 20

2.1.3 Higher-Density BCD Encoding 21

2.1.4 Packed and Unpacked BCD Numbers 21

2.2 Excess-3 Code 21

2.3 Gray Code 23

2.3.1 Binary-Gray Code Conversion 24

2.3.2 Gray Code-Binary Conversion 25

2.3.3 n-ary Gray Code 25

2.3.4 Applications 25

2.4 Alphanumeric Codes 27

2.4.1 ASCII code 28

2.4.2 EBCDIC code 31

2.4.3 Unicode 37

2.5 Seven-segment Display Code 38

2.6 Error Detection and Correction Codes 40

2.6.1 Parity Code 41

2.6.2 Repetition Code 41

2.6.3 Cyclic Redundancy Check Code 41

2.6.4 Hamming Code 42

Review Questions 44

Problems 45

Further Reading 45

3 Digital Arithmetic 47

3.1 Basic Rules of Binary Addition and Subtraction 47

3.2 Addition of Larger-Bit Binary Numbers 49

3.2.1 Addition Using the 2's Complement Method 49

3.3 Subtraction of Larger-Bit Binary Numbers 52

3.3.1 Subtraction Using 2's Complement Arithmetic 53

3.4 BCD Addition and Subtraction in Excess-3 Code 57

3.4.1 Addition 57

3.4.2 Subtraction 57

3.5 Binary Multiplication 58

3.5.1 Repeated Left-Shift and Add Algorithm 59

3.5.2 Repeated Add and Right-Shift Algorithm 59

3.6 Binary Division 60

3.6.1 Repeated Right-Shift and Subtract Algorithm 61

3.6.2 Repeated Subtract and Left-Shift Algorithm 62

3.7 Floating-Point Arithmetic 64

3.7.1 Addition and Subtraction 65

3.7.2 Multiplication and Division 65

Review Questions 67

Problems 68

Further Reading 68

4 Logic Gates and Related Devices 69

4.1 Positive and Negative Logic 69

4.2 Truth Table 70

4.3 Logic Gates 71

4.3.1 OR Gate 71

4.3.2 AND Gate 73

4.3.3 NOT Gate 75

4.3.4 EXCLUSIVE-OR Gate 76

4.3.5 NAND Gate 79

4.3.6 NOR Gate 79

4.3.7 EXCLUSIVE-NOR Gate 80

4.3.8 INHIBIT Gate 82

4.4 Universal Gates 85

4.5 Gates with Open Collector/Drain Outputs 85

4.6 Tristate Logic Gates 87

4.7 AND-OR-INVERT Gates 87

4.8 Schmitt Gates 88

4.9 Special Output Gates 91

4.10 Fan-Out of Logic Gates 95

4.11 Buffers and Transceivers 98

4.12 IEEE/ANSI Standard Symbols 100

4.12.1 IEEE/ANSI Standards - Salient Features 100

4.12.2 ANSI Symbols for Logic Gate ICs 101

4.13 Some Common Applications of Logic Gates 102

4.13.1 OR Gate 103

4.13.2 AND Gate 104

4.13.3 EX-OR/EX-NOR Gate 104

4.13.4 Inverter 105

4.14 Application-Relevant Information 107

Review Questions 109

Problems 110

Further Reading 114

5 Logic Families 115

5.1 Logic Families - Significance and Types 115

5.1.1 Significance 115

5.1.2 Types of Logic Family 116

5.2 Characteristic Parameters 118

5.3 Transistor Transistor Logic (TTL) 124

5.3.1 Standard TTL 125

5.3.2 Other Logic Gates in Standard TTL 127

5.3.3 Low-Power TTL 133

5.3.4 High-Power TTL (74H/54H) 134

5.3.5 Schottky TTL (74S/54S) 135

5.3.6 Low-Power Schottky TTL (74LS/54LS) 136

5.3.7 Advanced Low-Power Schottky TTL (74ALS/54ALS) 137

5.3.8 Advanced Schottky TTL (74AS/54AS) 139

5.3.9 Fairchild Advanced Schottky TTL (74F/54F) 140

5.3.10 Floating and Unused Inputs 141

5.3.11 Current Transients and Power Supply Decoupling 142

5.4 Emitter Coupled Logic (ECL) 147

5.4.1 Different Subfamilies 147

5.4.2 Logic Gate Implementation in ECL 148

5.4.3 Salient Features of ECL 150

5.5 CMOS Logic Family 151

5.5.1 Circuit Implementation of Logic Functions 151

5.5.2 CMOS Subfamilies 165

5.6 BiCMOS Logic 170

5.6.1 BiCMOS Inverter 171

5.6.2 BiCMOS NAND 171

5.7 NMOS and PMOS Logic 172

5.7.1 PMOS Logic 173

5.7.2 NMOS Logic 174

5.8 Integrated Injection Logic (I2L) Family 174

5.9 Comparison of Different Logic Families 176

5.10 Guidelines to Using TTL Devices 176

5.11 Guidelines to Handling and Using CMOS Devices 179

5.12 Interfacing with Different Logic Families 179

5.12.1 CMOS-to-TTL Interface 179

5.12.2 TTL-to-CMOS Interface 180

5.12.3 TTL-to-ECL and ECL-to-TTL Interfaces 180

5.12.4 CMOS-to-ECL and ECL-to-CMOS Interfaces 183

5.13 Classification of Digital ICs 183

5.14 Application-Relevant Information 184

Review Questions 185

Problems 185

Further Reading 187

6 Boolean Algebra and Simplification Techniques 189

6.1 Introduction to Boolean Algebra 189

6.1.1 Variables, Literals and Terms in Boolean Expressions 190

6.1.2 Equivalent and Complement of Boolean Expressions 190

6.1.3 Dual of a Boolean Expression 191

6.2 Postulates of Boolean Algebra 192

6.3 Theorems of Boolean Algebra 192

6.3.1 Theorem 1 (Operations with '0' and '1') 192

6.3.2 Theorem 2 (Operations with '0' and '1') 193

6.3.3 Theorem 3 (Idempotent or Identity Laws) 193

6.3.4 Theorem 4 (Complementation Law) 193

6.3.5 Theorem 5 (Commutative Laws) 194

6.3.6 Theorem 6 (Associative Laws) 194

6.3.7 Theorem 7 (Distributive Laws) 195

6.3.8 Theorem 8 196

6.3.9 Theorem 9 197

6.3.10 Theorem 10 (Absorption Law or Redundancy Law) 197

6.3.11 Theorem 11 197

6.3.12 Theorem 12 (Consensus Theorem) 198

6.3.13 Theorem 13 (DeMorgan's Theorem) 199

6.3.14 Theorem 14 (Transposition Theorem) 200

6.3.15 Theorem 15 201

6.3.16 Theorem 16 201

6.3.17 Theorem 17 (Involution Law) 202

6.4 Simplification Techniques 204

6.4.1 Sum-of-Products Boolean Expressions 204

6.4.2 Product-of-Sums Expressions 205

6.4.3 Expanded Forms of Boolean Expressions 206

6.4.4 Canonical Form of Boolean Expressions 206

6.4.5 _ and _ Nomenclature 207

6.5 Quine-McCluskey Tabular Method 208

6.5.1 Tabular Method for Multi-Output Functions 212

6.6 Karnaugh Map Method 216

6.6.1 Construction of a Karnaugh Map 216

6.6.2 Karnaugh Map for Boolean Expressions with a Larger Number of Variables 222

6.6.3 Karnaugh Maps for Multi-Output Functions 225

Review Questions 230

Problems 230

Further Reading 231

7 Arithmetic Circuits 233

7.1 Combinational Circuits 233

7.2 Implementing Combinational Logic 235

7.3 Arithmetic Circuits - Basic Building Blocks 236

7.3.1 Half-Adder 236

7.3.2 Full Adder 237

7.3.3 Half-Subtractor 240

7.3.4 Full Subtractor 242

7.3.5 Controlled Inverter 244

7.4 Adder-Subtractor 245

7.5 BCD Adder 246

7.6 Carry Propagation-Look-Ahead Carry Generator 254

7.7 Arithmetic Logic Unit (ALU) 260

7.8 Multipliers 260

7.9 Magnitude Comparator 261

7.9.1 Cascading Magnitude Comparators 263

7.10 Application-Relevant Information 266

Review Questions 266

Problems 267

Further Reading 268

8 Multiplexers and Demultiplexers 269

8.1 Multiplexer 269

8.1.1 Inside the Multiplexer 271

8.1.2 Implementing Boolean Functions with Multiplexers 273

8.1.3 Multiplexers for Parallel-to-Serial Data Conversion 277

8.1.4 Cascading Multiplexer Circuits 280

8.2 Encoders 280

8.2.1 Priority Encoder 281

8.3 Demultiplexers and Decoders 285

8.3.1 Implementing Boolean Functions...