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Static Timing Analysis for Nanometer Designs
A Practical Approach
Taschenbuch von Rakesh Chadha (u. a.)
Sprache: Englisch

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Beschreibung
iming, timing, timing! That is the main concern of a digital designer charged with designing a semiconductor chip. What is it, how is it T described, and how does one verify it? The design team of a large digital design may spend months architecting and iterating the design to achieve the required timing target. Besides functional verification, the t- ing closure is the major milestone which dictates when a chip can be - leased to the semiconductor foundry for fabrication. This book addresses the timing verification using static timing analysis for nanometer designs. The book has originated from many years of our working in the area of timing verification for complex nanometer designs. We have come across many design engineers trying to learn the background and various aspects of static timing analysis. Unfortunately, there is no book currently ava- able that can be used by a working engineer to get acquainted with the - tails of static timing analysis. The chip designers lack a central reference for information on timing, that covers the basics to the advanced timing veri- cation procedures and techniques.
iming, timing, timing! That is the main concern of a digital designer charged with designing a semiconductor chip. What is it, how is it T described, and how does one verify it? The design team of a large digital design may spend months architecting and iterating the design to achieve the required timing target. Besides functional verification, the t- ing closure is the major milestone which dictates when a chip can be - leased to the semiconductor foundry for fabrication. This book addresses the timing verification using static timing analysis for nanometer designs. The book has originated from many years of our working in the area of timing verification for complex nanometer designs. We have come across many design engineers trying to learn the background and various aspects of static timing analysis. Unfortunately, there is no book currently ava- able that can be used by a working engineer to get acquainted with the - tails of static timing analysis. The chip designers lack a central reference for information on timing, that covers the basics to the advanced timing veri- cation procedures and techniques.
Zusammenfassung

Provides a reference for engineers in the field of static timing analysis for semiconductors

Discusses the underlying theoretical background as well as in-depth coverage of timing verification using static timing analysis

Covers topics such as CMOS logic gates, cell library, timing arcs, waveform slew, and cell capacitance, among others

Inhaltsverzeichnis
STA Concepts.- Standard Cell Library.- Interconnect Parasitics.- Delay Calculation.- Crosstalk and Noise.- Configuring the STA Environment.- Timing Verification.- Interface Analysis.- Robust Verification.
Details
Erscheinungsjahr: 2011
Fachbereich: Nachrichtentechnik
Genre: Technik
Rubrik: Naturwissenschaften & Technik
Medium: Taschenbuch
Seiten: 592
Inhalt: xx
572 S.
225 s/w Illustr.
572 p. 225 illus.
ISBN-13: 9781441947154
ISBN-10: 1441947159
Sprache: Englisch
Ausstattung / Beilage: Paperback
Einband: Kartoniert / Broschiert
Autor: Chadha, Rakesh
Bhasker, J.
Auflage: 2009
Hersteller: Springer US
Springer US, New York, N.Y.
Maße: 235 x 155 x 32 mm
Von/Mit: Rakesh Chadha (u. a.)
Erscheinungsdatum: 08.09.2011
Gewicht: 0,885 kg
preigu-id: 106879065
Zusammenfassung

Provides a reference for engineers in the field of static timing analysis for semiconductors

Discusses the underlying theoretical background as well as in-depth coverage of timing verification using static timing analysis

Covers topics such as CMOS logic gates, cell library, timing arcs, waveform slew, and cell capacitance, among others

Inhaltsverzeichnis
STA Concepts.- Standard Cell Library.- Interconnect Parasitics.- Delay Calculation.- Crosstalk and Noise.- Configuring the STA Environment.- Timing Verification.- Interface Analysis.- Robust Verification.
Details
Erscheinungsjahr: 2011
Fachbereich: Nachrichtentechnik
Genre: Technik
Rubrik: Naturwissenschaften & Technik
Medium: Taschenbuch
Seiten: 592
Inhalt: xx
572 S.
225 s/w Illustr.
572 p. 225 illus.
ISBN-13: 9781441947154
ISBN-10: 1441947159
Sprache: Englisch
Ausstattung / Beilage: Paperback
Einband: Kartoniert / Broschiert
Autor: Chadha, Rakesh
Bhasker, J.
Auflage: 2009
Hersteller: Springer US
Springer US, New York, N.Y.
Maße: 235 x 155 x 32 mm
Von/Mit: Rakesh Chadha (u. a.)
Erscheinungsdatum: 08.09.2011
Gewicht: 0,885 kg
preigu-id: 106879065
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