William J. Dally is the Willard R. and Inez Kerr Bell Professor of Engineering at Stanford University and Chief Scientist at NVIDIA Corporation. He and his group have developed system architecture, network architecture, signaling, routing and synchronization technology that can be found in most large parallel computers today. He is a Member of the National Academy of Engineering, a Fellow of the IEEE, a Fellow of the ACM and a Fellow of the American Academy of Arts and Sciences. He has received numerous honors including the ACM Eckert-Mauchly Award, the IEEE Seymour Cray Award and the ACM Maurice Wilkes Award.

Part I. Introduction: 1. The digital abstraction; 2. The practice of digital system design; Part II. Combinational Logic: 3. Boolean algebra; 4. CMOS logic circuits; 5. Delay and power of CMOS circuits; 6. Combinational logic design; 7. VHDL descriptions of combinational logic; 8. Combinational building blocks; 9. Combinational examples; Part III. Arithmetic Circuits: 10. Arithmetic circuits; 11. Fixed- and floating-point numbers; 12. Fast arithmetic circuits; 13. Arithmetic examples; Part IV. Synchronous Sequential Logic: 14. Sequential logic; 15. Timing constraints; 16. Datapath sequential logic; 17. Factoring finite-state machines; 18. Microcode; 19. Sequential examples; Part V. Practical Design: 20. Verification and test; Part VI. System Design: 21. System-level design; 22. Interface and system-level timing; 23. Pipelines; 24. Interconnect; 25. Memory systems; Part VII. Asynchronous Logic: 26. Asynchronous sequential circuits; 27. Flip-flops; 28. Metastability and synchronization failure; 29. Synchronizer design; Appendix A. VHDL coding style; Appendix B. VHDL syntax guide; References; Index.