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Englisch
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Beschreibung
This book presents a formal model for evaluating the cost effectiveness of computer architectures. The model can cope with a wide range of architectures, from CPU design to parallel supercomputers. To illustrate the formal procedure of trade-off analyses, several non-pipelined design alternatives for the well-known RISC architecture called DLX are analyzed quantitatively. It is formally proved that the interrupt mechanism proposed for the DLX architecture handles nested interrupts correctly.
In an appendix all programs to compute the cost and cycle time of the designs described are listed in C code. Running these simple C programs on a PC is sufficient to verify the results presented. The book addresses design professionals and students in computer architecture.
In an appendix all programs to compute the cost and cycle time of the designs described are listed in C code. Running these simple C programs on a PC is sufficient to verify the results presented. The book addresses design professionals and students in computer architecture.
This book presents a formal model for evaluating the cost effectiveness of computer architectures. The model can cope with a wide range of architectures, from CPU design to parallel supercomputers. To illustrate the formal procedure of trade-off analyses, several non-pipelined design alternatives for the well-known RISC architecture called DLX are analyzed quantitatively. It is formally proved that the interrupt mechanism proposed for the DLX architecture handles nested interrupts correctly.
In an appendix all programs to compute the cost and cycle time of the designs described are listed in C code. Running these simple C programs on a PC is sufficient to verify the results presented. The book addresses design professionals and students in computer architecture.
In an appendix all programs to compute the cost and cycle time of the designs described are listed in C code. Running these simple C programs on a PC is sufficient to verify the results presented. The book addresses design professionals and students in computer architecture.
Inhaltsverzeichnis
The formal architecture model.- Functional modules.- Hardwired control.- Design of a minimal CPU.- Design of the DLX machine.- Trade-off analyses.- Interrupt.- Microprogrammed control.- Further applications of the architecture model.
Details
| Erscheinungsjahr: | 1995 |
|---|---|
| Fachbereich: | Hardware |
| Genre: | Informatik, Mathematik, Medizin, Naturwissenschaften, Technik |
| Rubrik: | Naturwissenschaften & Technik |
| Medium: | Taschenbuch |
| Inhalt: |
xii
273 S. |
| ISBN-13: | 9783540605805 |
| ISBN-10: | 3540605800 |
| Sprache: | Englisch |
| Einband: | Kartoniert / Broschiert |
| Autor: |
Mueller, Silvia M.
Paul, Wolfgang J. |
| Redaktion: |
Müller, Silvia M.
Paul, Wolfgang J. |
| Herausgeber: | Silvia M Müller/Wolfgang J Paul |
| Hersteller: |
Springer
Springer-Verlag GmbH |
| Verantwortliche Person für die EU: | Springer Verlag GmbH, Tiergartenstr. 17, D-69121 Heidelberg, juergen.hartmann@springer.com |
| Maße: | 235 x 155 x 16 mm |
| Von/Mit: | Silvia M. Müller (u. a.) |
| Erscheinungsdatum: | 25.10.1995 |
| Gewicht: | 0,446 kg |