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Beschreibung
This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.
This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.
Zusammenfassung
Discusses in detail a wide range of all-digital phase-locked loops architectures
Presents a unified framework in which to model time-to-digital converters for ADPLLs
Explains a procedure to predict and simulate phase noise in oscillators and ADPLLs
Describes an efficient approach to model ADPLLS
Includes Simulink and Matlab code to reproduce the examples in the book
Includes supplementary material: [...]
Inhaltsverzeichnis
Introduction.- Phase Digitization in All-Digital PLLs.- A Unifying Framework for TDC Architectures.- Analytical Predictions of Phase Noise in ADPLLs.- Advantages of Noise Shaping and Dither.- Efficient Modeling and Simulation of Accumulator-Based ADPLLs.- Modelling and Estimating Phase Noise with Matlab.
Details
| Erscheinungsjahr: | 2016 |
|---|---|
| Fachbereich: | Nachrichtentechnik |
| Genre: | Mathematik, Medizin, Naturwissenschaften, Technik |
| Rubrik: | Naturwissenschaften & Technik |
| Medium: | Taschenbuch |
| Reihe: | Analog Circuits and Signal Processing |
| Inhalt: |
xiii
177 S. 66 s/w Illustr. 79 farbige Illustr. 177 p. 145 illus. 79 illus. in color. |
| ISBN-13: | 9783319344416 |
| ISBN-10: | 3319344412 |
| Sprache: | Englisch |
| Einband: | Kartoniert / Broschiert |
| Autor: |
Brandonisio, Francesco
Kennedy, Michael Peter |
| Auflage: | Softcover reprint of the original 1st edition 2014 |
| Hersteller: |
Springer
Springer International Publishing AG Analog Circuits and Signal Processing |
| Verantwortliche Person für die EU: | Springer Verlag GmbH, Tiergartenstr. 17, D-69121 Heidelberg, juergen.hartmann@springer.com |
| Maße: | 235 x 155 x 11 mm |
| Von/Mit: | Francesco Brandonisio (u. a.) |
| Erscheinungsdatum: | 27.08.2016 |
| Gewicht: | 0,3 kg |