Erik Seligman: Formal Verification

Cover: 9780128007273 | Formal Verification | An Essential Toolkit for Modern VLSI Design

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Sprache: Englisch

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Beschreibung

Formal Verification: An Essential Toolkit for Modern VLSI Design presents practical approaches for design and validation, with hands-on advice to help working engineers integrate these techniques into their work. Formal Verification (FV) enables a designer to directly analyze and mathematically explore the quality or other aspects of a Register Transfer Level (RTL) design without using simulations. This can reduce time spent validating designs and more quickly reach a final design for manufacturing. Building on a basic knowledge of SystemVerilog, this book demystifies FV and presents the practical applications that are bringing it into mainstream design and validation processes at Intel and other companies. After reading this book, readers will be prepared to introduce FV in their organization and effectively deploy FV techniques to increase design and validation productivity.

Inhaltsverzeichnis

Formal Verification: From Dreams to Reality
Basic Formal Verification Algorithms
Introduction to SystemVerilog Assertions
Formal Property Verification
Effective FPV For Design Exercise
Effective FPV for Verification
FPV "Apps for Specific SOC Problems
Formal Equivalence Verification
Formal Verification's Greatest Bloopers: The Danger of False Positives
Dealing with Complexity
Your New FV-Aware Lifestyle

Details

Fachbereich:	Nachrichtentechnik
Genre:	Technik
Rubrik:	Naturwissenschaften & Technik
Medium:	Taschenbuch
ISBN-13:	9780128007273
ISBN-10:	0128007273
Sprache:	Englisch
Herstellernummer:	C2013-0-18672-2
Autor:	Seligman, Erik Schubert, Tom Kumar, M V Achutha Kiran
Hersteller:	Morgan Kaufmann
Verantwortliche Person für die EU:	preigu, Ansas Meyer, Lengericher Landstr. 19, D-49078 Osnabrück, mail@preigu.de
Maße:	19 x 186 x 232 mm
Von/Mit:	Erik Seligman (u. a.)
Gewicht:	0,788 kg