Kerim Türe received his B.S. degrees in both Electrical and Electronics Engineering & Physics from Böaziçi University, Istanbul, Turkey in 2012, the [...]. degree in Electrical and Electronics Engineering from Swiss Federal Institute of Technology, Lausanne (EPFL), Lausanne, Switzerland, in 2014. He received his Ph.D. degree on wireless power transmission and radio frequency communication in RFIC Research Group at EPFL in 2019. His research interests include low-power analog and RF CMOS integrated circuit design for wireless sensor systems and biomedical applications.

Catherine Dehollain (M'93) received the Master's degree in electrical engineering and the Ph.D. degree from the Swiss Federal Institute of Technology, Lausanne (EPFL), Switzerland, in 1982 and 1995, respectively. From 1982 to 1984, she was a Research Assistant at the Electronics Laboratories (LEG), EPFL. In 1984, she joined the Motorola European Center for Research and Development, Geneva, Switzerland, where she designed integrated circuits applied to telecommunications. In 1990, she joined EPFL as a Senior Assistant at the "Chaire des Circuits et Systemes," where she was involved in impedance broadband matching. Since 1995, she has been responsible for the EPFL-RFIC Group for RF activities. She has been the technical project manager of the European projects, Swiss CTI projects, and the Swiss National Science Foundation projects dedicated to mobile phones, RF wireless micropower sensor networks, and biomedical applications. Since 1998, she has been a Lecturer at EPFL in the area of RF circuits, electric filters, and CMOS analog circuits. From 2006 to 2014, she was a Maitre d'Enseignement et de Recherche (MER) at EPFL. Since 2014, she has been Adjunct Professor at EPFL. She is an author or coauthor of six scientific books and 180 scientific publications. Her research interests include low-power analog circuits, biomedical remotely powered sensors, and electric filters.

Franco Maloberti (A'84-SM'87-F'96-LF'15) received the Laurea degree (summa cum laude) in physics from the University of Parma, Italy. He was a Visiting Professor with ETH-PEL, Zürich and at EPFL-LEG, Lausanne. He was the [...] Analog Engineering Chair Professor with Texas A&M University and the Distinguished Microelectronic Chair Professor with The University of Texas at Dallas. He is currently an Emeritus Professor with the University of Pavia, Italy. He is also an Honorary Professor with the University of Macau, China. His professional expertise is in the design, analysis and characterization of integrated circuits and analogue digital applications, mainly in the areas of switched capacitor circuits, data converters, interfaces for telecommunication and sensor systems, and CAD for analogue and mixed A-D design. He has written more than 600 published papers, seven books and holds 38 patents. He received the 1999 IEEE CAS Society Meritorious Service Award, the 2000 CAS Society Golden Jubilee Medal,the IEEE Millenium Medal, the 1996 IEE Fleming Premium, the ESSCIRC 2007 Best Paper Award, the IEEJ Workshop 2007, the 2010 Best Paper Award, and the IEEE CAS Society 2013 Mac Van Valkenburg Award. He received the Dr. Honoris Causa degree in electronics from Inaoe, Puebla, Mexico. He is the Chairman of the Academic Committee of the AMSV State Key Laboratory, Macau, China. He was an Associate Editor of IEEE-TCAS-II, the President of the IEEE Sensor Council from 2002 to 2003, IEEE CAS BoG Member from 2003 to 2005, the Vice President (VP) of Publications IEEE CAS from 2007 to 2008. He was a Distinguished Lecturer (DL) IEEE SSC Society from 2009 to 2010 and the IEEE CAS Society from 2006 to 2007 and from 2012 to 2013. He is the Past President of the IEEE CAS Society from 2017 to 2018 and the President from 2015 to 2016. He was the VP of Region 8 of IEEE CAS from 1995 to 1997.

This book is the first graduate-level textbook presenting a comprehensive treatment of Data Converters. It provides comprehensive definition of the parameters used to specify data converters, and covers all the architectures used in Nyquist-rate data converters. The advancement of digital electronics urged the availability of a still missing support for teaching and self-learning analog-digital interfaces at many levels: the specification, the conversion methods and architectures, the circuit design and the testing. The book uses Simulink and Matlab extensively in examples and problem sets. This is a textbook that is also essential for engineering professionals as it was written in response to a shortage of organically organized material on the topic. The book assumes a solid background in analog and digital circuits as well as a working knowledge of simulation tools for circuit and behavioral analysis.

1. BACKGROUND ELEMENTS. 1.1 The Ideal Data Converter. 1.2 The Sampling. 1.2.1 Undersampling. 1.2.2 Sampling-time Jitter. 1.3 Amplitude Quantization. 1.3.1 Quantization Noise. 1.3.2 Properties of the Quantization Noise. 1.4 kT/C Noise. 1.5 Discrete and Fast Fourier Transforms. 1.5.1 Windowing. 1.6 Coding Schemes. 1.7 The D/A Converter. 1.7.1 Ideal Reconstruction. 1.7.2 Real Reconstruction. 1.8 The z-Transform. References. 2. DATA CONVERTERS SPECIFICATIONS. 2.1 Type of Converter. 2.2 Conditions of Operation. 2.3 Converter Specifications. 2.3.1 General Features. 2.4 Static Specifications. 2.5 Dynamic Specifications. 2.6 Digital and Switching Specifications. References. 3. NYQUIST-RATE D/A CONVERTERS. 3.1 Introduction. 3.1.1 DAC Applications. 3.1.2 Voltage and Current References. 3.2 Types of Converters. 3.3 Resistor based Architectures. 3.3.1 Resistive Divider. 3.3.2 X-Y Selection. 3.3.3 Settling of the Output Voltage. 3.3.4 Segmented Architectures. 3.3.5 Effect of the Mismatch. 3.3.6 Trimming and Calibration. 3.3.7 Digital Potentiometer. 3.3.8 R-2R Resistor Ladder DAC. 3.3.9 Deglitching. 3.4 Capacitor Based Architectures. 3.4.1 Capacitive Divider DAC. 3.4.2 Capacitive MDAC. 3.4.3 'Flip Around' MDAC. 3.4.4 Hybrid Capacitive-Resistive DACs. 3.5 Current Source based Architectures. 3.5.1 Basic Operation. 3.5.2 Unity Current Generator. 3.5.3 Random Mismatch Unary Selection. 3.5.4 Current Sources Selection. 3.5.5 Current Switching and Segmentation. 3.5.6 Switching of Current Sources. 3.6 Other Architectures. References. 4. NYQUIST RATE A/D CONVERTERS. 4.1 Introduction. 4.2 Timing Accuracy. 4.2.1 Metastability error. 4.3 Full-Flash Converters. 4.3.1 Reference Voltages. 4.3.2 Offset of Comparators. 4.3.3 Offset Auto-zeroing. 4.3.4 Practical Limits. 4.4 Subranging and Two-Step Converters. 4.4.1 Accuracy requirements. 4.4.2 Two-step Converter as a Non-linear Process. 4.5 Folding Technique and Interpolation. 4.5.1 Double Folding. 4.5.2 Interpolation. 4.5.3 Use of Interpolation in Flash Converters. 4.5.4 Use of Interpolation in Folding Architectures. 4.5.5 Interpolation for Improving Linearity. 4.6 Time-Interleaved Converters. 4.6.1 Accuracy requirements. 4.7 Successive Approximation Converter. 4.7.1 Errors and Error Correction. 4.8 Pipeline Converters. 4.8.1 Accuracy Requirements. 4.8.2 Digital Correction. 4.8.3 Dynamic Performances. 4.8.4 Sampled-data Residue Generator. 4.9 Other Architectures. 4.9.1 Cyclic (or Algorithmic) Converter. 4.9.2 Integrating Converter. 4.9.3 Voltage-to-Frequency Converter. References. 5. CIRCUITS FOR DATA CONVERTERS. 5.1 Sample-and-Hold. 5.2 Diode Bridge S&H. 5.2.1 Diode Bridge Imperfections. 5.2.2 Improved Diode Bridge. 5.3 Switched Emitter Follower. 5.3.1 Circuit Implementation. 5.3.2 Complementary Bipolar S&H. 5.4 Features of S&H made by BJT. 5.5 CMOS Sample-and-Hold. 5.5.1 Clock Feedthrough. 5.5.2 Clock Feedthrough Compensation. 5.5.3 Two-stages OTA as T&H. 5.5.4 Use of the Virtual Ground in CMOS S&H. 5.5.5 Noise Analysis. 5.6 CMOS Switch with Low Supply Voltage. 5.6.1 Switch Bootstrapping. 5.7 Folding Amplifiers. 5.7.1 Current-Folding. 5.7.2 Voltage Folding. 5.8 Voltage-to-Current Converter. 5.9 Clock Generation. References. 6. OVERSAMPLING DATA CONVERTERS. 6.1 Introduction. 6.1.1 Delta and Sigma-Delta Modulation. 6.2 First and Second Order Sigma-Delta Modulators. 6.2.1 Intuitive Views. 6.2.2 Use of 1-bit Quantization. 6.2.3 Second Order Modulator. 6.2.4 Quantization Error and Dithering. 6.3 High Order Noise Shaping. 6.3.1 Dynamic Range Considerations. 6.3.2 Dynamic Ranges Optimization. 6.4 Practical Considerations. 6.4.1 Offset. 6.4.2 Finite Op-Amp Gain. 6.4.3 Finite Op-Amp Bandwidth. 6.4.4 Finite Op-Amp Slew-Rate. 6.4.5 Noise Considerations. 6.4.6 ADC Non-idealities. 6.4.7 DAC Non-idealities. 6.4.8 Single-bit and Multi-bit. 6.4.9 SNR Enhancement. 6.5 High Order Architectures. 6.5.1 Use of Weighted Feedback Summation. 6.5.2 Use of Local